发明名称 METHOD FOR FORMING ISOLATION LAYER IN SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming an isolation layer in a semiconductor device is provided to simplify manufacturing processes and to improve reliability by simultaneously forming a trench-type and LOCOS-type isolation layer at a cell and peripheral region. CONSTITUTION: After forming the first and second insulating layer on a substrate, the first and second trench are formed at a cell and peripheral region by etching the second and first insulating layer and the substrate. An oxide spacer is formed at sidewall of the cell region. Two heavily doping layers are formed in the substrate. The heavily doping layer is removed except for the heavily doping layer located at the bottom of the second trench. A field oxide layer is formed at the peripheral region. After forming a planarized insulating layer on the resultant structure, a trench-type isolation layer(35) and a LOCOS-type isolation layer(37) are formed at a cell and peripheral region, respectively by polishing the planarized insulating layer.
申请公布号 KR100329607(B1) 申请公布日期 2002.03.11
申请号 KR19950014598 申请日期 1995.06.02
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, SEUNG JUN;SHIN, GI SU
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址