| 摘要 |
<p>A semiconductor storage device in which an operation check can be made in the worst case of address combination and its testing method are disclosed. In testing the semiconductor storage device, specific data is written in a memory cell array (30), a test mode is set up by using a test signal (TE1) of 1 , a refresh address for test is stored in a data storage circuit (51), a first address for test is applied to an address terminal (21) thereby to conduct normal read or write according to the fist address, a second address for test is applied to the address terminal (21) thereby to conduct refresh according to the refresh address and to conduct normal read or write according to the second address, and data in the memory cell array (30) is checked to detect a false if any.</p> |
