发明名称 Method for testing a CMOS integrated circuit
摘要 Testing a CMOS integrated circuit includes establishing a current threshold value, powering the integrated circuit in static and idle conditions, measuring the current absorbed by the integrated circuit and comparing this with the threshold value and accepting or rejecting the integrated circuit if the comparison shows that the current absorbed measured is respectively lower or higher than the threshold value. To improve discrimination between non-faulty and faulty devices, the threshold value is obtained by forming two measurement transistors in the integrated circuit, one n channel and the other p channel, biasing these in the cut-off zone and measuring their sub-threshold currents. Also, the method includes calculating the sub-threshold currents by channel unit of area of the transistors of the integrated circuit using the sub-threshold currents measured and the channel areas of the measurement transistors, obtaining the sum of the channel areas of the transistors that are cut off when the integrated circuit is idle in static conditions, and calculating the current absorbed by the integrated circuit when idle in static conditions using the result of the two operations described above and adding a pre-established current increase to the current absorbed to obtain the threshold value.
申请公布号 US2002029124(A1) 申请公布日期 2002.03.07
申请号 US20010765502 申请日期 2001.01.18
申请人 STMICROELECTRONICS S.R.L. 发明人 DALLAVALLE CARLO
分类号 G01R31/26;G01R31/28;G01R31/30;H01L21/66;H01L21/822;H01L27/04;(IPC1-7):G06F19/00 主分类号 G01R31/26
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