METHOD AND APPARATUS FOR A UNIFIED RISC/DSP PIPELINE CONTROLLER FOR BOTH REDUCED INSTRUCTION SET COMPUTER (RISC) CONTROL INSTRUCTIONS AND DIGITAL SIGNAL PROCESSING (DSP) INSTRUCTIONS

摘要

A method and apparatus for a unified RISC/DSP pipeline controllerto control the execution of both reduced instruction set computer (RISC) control instructions and digital signal processing (DSP) instructions for a signal processor. The unified RISC/DSP pipeline controller is coupled to a program memory (204), a RISC control unit (302), and at least one signal processing unit. The program stores both DSP and RISC instructions and the RISC control unit controls the flow of operands and results between the signal processing unit and datra memory (202) that stores data. The signal processing unit executes the DSP instruction. The unified RISC/DSPpipeline controller generates DSP control signals to control the execution of the DSP instruction by the signal processing unit and RISC control signals to control the execution of the RISC control instruction by the RISC control unit.