发明名称 Memory circuitry with spaced conductive lines of different elevational thickness
摘要 Methods of forming conductive lines and insulative spacers thereover are described. In accordance with one aspect of the invention, a substrate is provided having a first area and a second area relative to which conductive lines are to be formed. A layer of conductive material is formed over the first and second substrate areas and a layer of insulative material is formed over the conductive material. In a preferred implementation, insulative material is removed from the second area and conductive lines are subsequently patterned and etched in both the first and second areas. In another preferred implementation, conductive lines are first patterned and etched with insulative material in the second area being subsequently removed. The patterned and etched conducted lines have respective sidewalls. Subsequently, a layer of insulative material is formed over the substrate, the conductive lines, and the respective sidewalls thereof, and in at least one common etching step, the insulative material is etched to a degree sufficient to form sidewall spacers over the respective sidewalls. In accordance with one aspect, the one common etching step comprises an anisotropic etching step. In accordance with another aspect, the one common etching step comprises at least one facet etching step.
申请公布号 US6353241(B1) 申请公布日期 2002.03.05
申请号 US20000654295 申请日期 2000.09.01
申请人 MICRON TECHNOLOGY, INC. 发明人 MANNING H. MONTGOMERY
分类号 H01L21/8234;H01L21/8242;H01L27/108;H01L29/76;H01L29/94;H01L31/119;(IPC1-7):H01L27/108 主分类号 H01L21/8234
代理机构 代理人
主权项
地址
您可能感兴趣的专利