发明名称 |
METHOD FOR FORMING INTERCONNECTION LAYER OF SEMICONDUCTOR DEVICE USING DAMASCENE PROCESS |
摘要 |
PURPOSE: A method for forming an interconnection layer of a semiconductor device using a damascene process is provided to remarkably reduce parasitic capacitance between interconnections of the semiconductor device by eliminating an etch stop layer of high permittivity under an insulation layer. CONSTITUTION: The etch stop layer(110') is formed on a semiconductor substrate(100). The etch stop layer not exposed to an interconnection region is removed. The insulation layer(310) is formed on the entire surface. The insulation layer is etched to form a trench exposing the non-etched etch stop layer. The interconnection layer(510) composed of a metal layer is formed in the trench.
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申请公布号 |
KR20020016098(A) |
申请公布日期 |
2002.03.04 |
申请号 |
KR20000049247 |
申请日期 |
2000.08.24 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JUNG, CHANG HWAN;LEE, WON GYU |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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