| 摘要 |
An address generator is provided for generating addresses needed to read out data from a memory. The address generator includes a first and a second latch circuits, and a first counter connected to each of the first and the second latch circuits. The address generator also includes a first and a second storages each of which is connected to the first counter. The address generator further includes a second counter connected to each of the first and the second storages.
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