GROUP DELAY GENERATING CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a group delay generating circuit capable of generating satisfactory peaking characteristics and controlling a peaking quantity thereof without deteriorating the input/output matching characteristics of the group delay generating circuit. SOLUTION: This circuit is provided with an FET source ground amplifier 1 provided with a bipolar transistor or FET connecting a base or gate to an input terminal and connecting an emitter or source to a constant potential point, a variable inductor circuit 4 connecting one terminal to the collector side or drain side of the transistor and connecting the other terminal to the bias power source of the transistor, a variable capacitor circuit 2 connecting one terminal to the collector or drain of the transistor, and a variable resistor circuit 3 connecting one terminal to the other terminal of the variable capacitor circuit and connecting the other terminal to the constant potential point.