发明名称 Apparatus and methods for testing simultaneous bi-directional I/O circuits
摘要 A simultaneous bi-directional I/O circuit includes a first MUX in the reference select circuitry and a second, matching MUX in the pre-driver stage of the output buffer. In normal mode, the first MUX passes the driven data output signal, which controls the threshold of the differential receiver circuit between two different non-zero voltage levels, so that the receiver circuit can properly decode an incoming signal at the I/O node or pin. In an AC switching state or loopback test mode, the first MUX deselects the driven data output signal from controlling the receiver circuit. This allows the receiver circuit to decode outgoing data that is being looped back as incoming data. The second MUX enables the reference select circuitry to switch at a rate that matches the output slew rate in order to provide high-speed operation. Also described are an electronic system, a data processing system, and various methods of testing simultaneous bi-directional I/O circuits.
申请公布号 US6348811(B1) 申请公布日期 2002.02.19
申请号 US20000605479 申请日期 2000.06.28
申请人 INTEL CORPORATION 发明人 HAYCOCK MATTHEW B.;MOONEY STEPHEN R.
分类号 H04L1/24;(IPC1-7):H03L19/00 主分类号 H04L1/24
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