发明名称 Method for reading data from a memory arrangement e.g. for semiconductor memory devices such as MRAM, has address decoder connected to word- and to bit-line decoders
摘要 A method for reading data from a memory arrangement (15-18) having several memory units (11-14), each of the latter having memory cells equipped with word- and bit-lines; the memory units have a word-line decoder (2) and a bit-line decoder (3). An address decoder (21) is connected to the word-line decoders (2) and to the bit-line decoders (3). Data is read out from the memory cells alternately from different memory units (11-14).
申请公布号 DE10054521(A1) 申请公布日期 2002.02.14
申请号 DE20001054521 申请日期 2000.11.03
申请人 INFINEON TECHNOLOGIES AG 发明人 HOENIGSCHMID, HEINZ;MUELLER, GERHARD
分类号 G11C7/10;G11C7/22;G11C8/10;(IPC1-7):G11C7/00;G11C8/00 主分类号 G11C7/10
代理机构 代理人
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