发明名称 Silicon on insulator transistor structure for imbedded DRAM
摘要 To address the above-discussed deficiencies of the prior art, the present invention provides an integrated circuit formed on a semiconductor wafer, comprising a doped base substrate; an insulator layer formed over the doped base substrate; and a doped ultra thin active layer formed on the insulator layer, the ultra thin active layer including a gate oxide, a gate formed on the gate oxide, and source and drain regions formed in the ultra thin active layer and adjacent the gate. The present invention therefore provides a semiconductor wafer that provides a doped ultra thin active layer. The lower Ioff in the DRAM transistor allows for lower heat dissipation, and the overall power requirement is decreased. Thus, the present invention provides a lower Ioff with reasonably good ion characteristics.
申请公布号 US2002019096(A1) 申请公布日期 2002.02.14
申请号 US20010915989 申请日期 2001.07.26
申请人 CHOI SEUNGMOO;MERCHANT SAILESH;ROY PRADIP K. 发明人 CHOI SEUNGMOO;MERCHANT SAILESH;ROY PRADIP K.
分类号 H01L21/8242;H01L29/786;(IPC1-7):H01L21/824;H01L27/108;H01L29/76;H01L29/94;H01L31/119 主分类号 H01L21/8242
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