发明名称 |
Semiconductor device and method of manufacturing same |
摘要 |
A semiconductor device and a manufacturing method thereof are obtained which can restrain increase of the parasitic capacitance generated between contact plugs of source/drain regions and a gate electrode while reducing the area of the source/drain regions. A channel region is formed under a gate electrode 1. A pair of source/drain regions 2 are formed to sandwich the channel region. The source/drain regions 2 have a first part 3a being adjacent to the channel region and a second part 3b formed to protrude in a channel width direction from the first part 3a so that a part of outer peripheries of the source/drain regions 2 extend away from the gate electrode 1 in a plan view. Contact plugs 4 are formed on the second part 3b for connecting the source/drain regions 2 to source/drain wirings.
|
申请公布号 |
US2002017689(A1) |
申请公布日期 |
2002.02.14 |
申请号 |
US20010778104 |
申请日期 |
2001.02.07 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
HIRANO YUUICHI;MAEDA SHIGENOBU;MAEGAWA SHIGETO |
分类号 |
H01L23/522;H01L21/316;H01L21/334;H01L21/336;H01L21/762;H01L21/768;H01L21/8238;H01L21/84;H01L27/08;H01L27/092;H01L27/12;H01L29/06;H01L29/417;H01L29/423;H01L29/78;H01L29/786;(IPC1-7):H01L27/01 |
主分类号 |
H01L23/522 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|