发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To improve the PN-separation-oriented withstanding voltage of a semiconductor device without increasing largely the separation width of its trench, without altering the doses of its ion implantations, and without increasing the number of its manufacturing processes. SOLUTION: In the semiconductor device, a P-well region 20 having on its surface a P+-diffusion-layer region 26 and an N-well region 12 having on its surface an N+-diffusion-layer region 25 are separated from each other by a trench oxide film 6. Also, on the sides of the P-well and N-well regions 20, 12, there are provided respectively P-type and N-type heavily doped regions 22b, 14b which are formed equally on the bottom surface of the trench oxide film 6. Further, the impurity concentrations of the P+-diffusion-layer region 26 and the P-type heavily doped region 22b are made higher than the one of the P-well region 20. Moreover, the impurity concentrations of the N+-diffusion- layer region 25 and the N-type heavily doped region 14b are made higher than the one of the N-well region 12.
申请公布号 JP2002043534(A) 申请公布日期 2002.02.08
申请号 JP20000228808 申请日期 2000.07.28
申请人 NEC CORP 发明人 KAMIMURA TOSHIHIRO
分类号 H01L21/76;H01L27/08;(IPC1-7):H01L27/08 主分类号 H01L21/76
代理机构 代理人
主权项
地址