Electrostatic discharge protecting circuit for semiconductor device

摘要

An electrostatic discharge protecting circuit for a semiconductor device is provided and includes a first circuit portion including an N-type MOS field effect transistor formed on a P-type silicon substrate and a P-type MOS field effect transistor formed on an N-type well in the P-type silicon substrate. The electrostatic discharge protecting circuit operates in a normal operating mode and an electrostatic discharge evaluation mode. In the normal operating mode, the N- and P-type MOS transistors operate as an output buffer connected to an internal circuit. In the electrostatic discharge characteristic mode, an electrostatic discharge signal is applied from an external source through a pad and switching devices included in a second portion of the electrostatic discharge protecting circuit connect a bulk terminal of the N-type MOS transistor to a ground voltage, thereby improving electrostatic discharge characteristics of the semiconductor device.