RAM RESET METHOD AND RAM INTERFACE CIRCUIT

摘要

PROBLEM TO BE SOLVED: To accelerate the speed of reset by reducing machine cycles necessary for the reset of a RAM to be incorporated in a microprocessing unit. SOLUTION: An operation to perform the reset by writing '0' on the entire surface of the RAM in the conventional manner is not performed. Instead, a RAM interface circuit 24 executes access control and the same effect that the '0' is written on the entire surface of the RAM is produced. When a read access is made to a section number to which no write access is made yet after detecting that a reset signal becomes active by a reset detecting circuit 13, an address conversion circuit 14 accesses a special section number and forcibly output the reset data ('0') as read data.