发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING MULTILAYER WIRING STRUCTURE, AND METHOD FOR MANUFACTURING THE SAME |
摘要 |
PROBLEM TO BE SOLVED: To easily realize a long wiring within a chip for high-speed operation. SOLUTION: A wiring required for high-speed operation is appropriately and easily practiced, because a block 20 for interlayer connection for connecting from the fifth uppermost level wiring layer 25 with its wiring pitch can be made wide and wiring itself wide and thick to the first lowermost level wiring layer 21 via through-holes 35 to 32 by the shortest route is automatically wired beforehand. For more effective operation, the cross section of the through holes 32 to 35 is preferably made wider. Branching out construction in the upper wiring layer may also be set beforehand.
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申请公布号 |
JP2002026133(A) |
申请公布日期 |
2002.01.25 |
申请号 |
JP20000210746 |
申请日期 |
2000.07.12 |
申请人 |
NEC CORP |
发明人 |
KOIZUMI YUJI |
分类号 |
H01L21/3205;H01L21/768;H01L21/82;H01L21/822;H01L23/52;H01L23/522;H01L27/04;(IPC1-7):H01L21/82;H01L21/320 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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