发明名称 INFORMATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To derive the optimal performance of an IO card or entire system by connecting the IO card operable in plural frequencies to a bus to operate in an optimal frequency. SOLUTION: Plural PCI slots 131-136 (connectors) can be connected to/ disconnected from plural PCI buses 105 and 106, which are individually driven by plural PCI bridges 101 and 102, through bus switches 111-122, the operable frequency of the IO card packaged on the connector is identified by a frequency identifying circuit 103, and the bus switches 111-122 are controlled by a switch control circuit 104 corresponding to the identified result. When the IO card, which can be operated only in the slow frequency, is inserted, the connection of each of connectors is switched to the bus to slowly operate and when the IO card operable in the quick frequency is inserted, the connection is switched to the bus to operate quickly.
申请公布号 JP2002024155(A) 申请公布日期 2002.01.25
申请号 JP20000200719 申请日期 2000.07.03
申请人 HITACHI LTD 发明人 MORIYAMA TAKASHI
分类号 G06F13/14;G06F13/36;G06F15/16;G06F15/177;(IPC1-7):G06F13/14 主分类号 G06F13/14
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