| 摘要 |
PROBLEM TO BE SOLVED: To provide a no-hit switching transmission system which reduces a circuit scale, easily copes with a VC-4-4c signal and a VC-4-16c signal and transmits a J1 byte. SOLUTION: A 0-system frame aligner part 4c and a 1-system frame aligner part 4d in a device on a receiving side 4 has a frame alignment function and respectively read 0-system data and 1-system data to the position of a pointer value '522' which is always to frames behind. A memory control part 4e detects the J1 multi-frame phase difference between the 0-system data and 1-system data after passing a frame aligner, and instructs the insertion of a delay quantity to a 0-system frame memory part 4f and a 1-system frame memory part 4g.
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