发明名称 DISTRIBUTED SHARED MEMORY TYPE PARALLEL COMPUTER
摘要 <p>PROBLEM TO BE SOLVED: To suppress increase of traffic on a shared bus used for management of cache consistency and also to suppress delay of memory access about a distributed shared memory type computer having a constitution including plural nodes connected together via the mutual connection means. SOLUTION: Each of nodes has plural cache consistency management means and a consistency management selection means which selects a cache consistency management means according to the type of memory access. Then these nodes are connected together by means of the mutual connection means corresponding to each cache consistency management means.</p>
申请公布号 JP2002024198(A) 申请公布日期 2002.01.25
申请号 JP20000205649 申请日期 2000.07.06
申请人 FUJITSU LTD 发明人 SATO MITSURU
分类号 G06F12/08;G06F15/167;G06F15/17;G06F15/177;(IPC1-7):G06F15/177 主分类号 G06F12/08
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