| 摘要 |
A wire load estimating method comprises (1) reading a netlist; (2) generating connection information including the names of signals, the identification names and the names of pins of instances which include cells, macro blocks and synthesized blocks as described in the netlist; (3) dividing an area of a chip into two or more regions and determining connection point coordinates for each of the regions by the use of the connection information and locations of the instances as placed; (4) determining a wiring path by the use of the connection point coordinates; and (5) estimating a wire capacitance value and a wire resistance value with reference to the wiring path.
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