发明名称 |
SIMULTANEOUS NULLING IN LOW SIDELOBE SUM AND DIFFERENCE ANTENNA BEAM PATTERNS |
摘要 |
A radar system includes a null processor coupled to transmit receive modules. The null processor inserts nulls in the sum pattern at locations for suppressing a jamming source. The null processor determines the difference pattern based upon the product: sum*sin(x), where sum is the sum pattern and x is the azimuth angle. |
申请公布号 |
WO0206850(A2) |
申请公布日期 |
2002.01.24 |
申请号 |
WO2001US11875 |
申请日期 |
2001.04.11 |
申请人 |
RAYTHEON COMPANY |
发明人 |
CHANG, KAI-CHIANG;GREEN, LEON;PREISS, JOSEPH |
分类号 |
G01S7/36;G01S13/44;H01Q3/26;H01Q25/02 |
主分类号 |
G01S7/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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