发明名称 SCAN PATH CIRCUIT, GENERATION METHOD FOR SCAN PATH CIRCUIT AND RECORDING MEDIUM WITH RECORDED PROGRAM FOR IT
摘要 PROBLEM TO BE SOLVED: To reduce a man-hour for creating a test pattern by a manual operation, to reduce the area overhead of a scan path circuit and to shorten the test time. SOLUTION: A label latch 41 which fetches the output of a scan flip-flop 30 in a scan shift operation so as to be held in a capture operation and so as to be output as the input signal of a combination circuit 20, the combination circuit 20 and gate circuits 21 to 23 to which the output of the semiconductor circuit 20 is input so as to be gate-output in the capture operation are provided across the output terminal of the scan flip-flop 30 and reset terminals of scan flip-flops 31, 32. An enable-signal generation circuit 42 which generates a latch enable signal used to control the label latch 41 so as to correspond to a test- mode signal and a scan-enable signal is provided.
申请公布号 JP2002022805(A) 申请公布日期 2002.01.23
申请号 JP20000207271 申请日期 2000.07.07
申请人 NEC MICROSYSTEMS LTD 发明人 SANNOMIYA TAKAYOSHI
分类号 G01R31/28;G06F17/50;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 主分类号 G01R31/28
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