Primary bus to secondary bus multiplexing for I2C and other serial buses

摘要

A computer or other electronic system includes a primary I2C bus and a plurality of secondary I2C buses that can be selectively coupled to the primary bus. The primary I2C bus is coupled to the input of an I/O expander, which has a unique address on the primary bus, and to the bus input of a bus switch. Each of the secondary I2C buses is coupled to a unique one of the bus outputs of the bus switch, which are controlled by a plurality on control inputs. Activating a selected control input of the bus switch couples the primary I2C bus to the corresponding secondary I2C bus. A controller addresses the I/O expander and then transmits a unique data byte that activates a selected output of the expander. Each of the outputs of the I/O expander is coupled to a unique control input of the bus switch through a delay circuit. The delay circuit delays the activation of the corresponding control input of the bus switch until after an acknowledge bit and a stop bit have been communicated over the primary I2C bus, so that the switching from one secondary bus to another occurs at the appropriate time.