发明名称 Charge retention lifetime evaluation method for nonvolatile semiconductor memory
摘要 In a nonvolatile semiconductor memory, a floating gate electrode is disposed above a silicon substrate between source and drain regions, through a tunnel film, and a control gate electrode is disposed above the floating gate electrode through an insulating film. The substrate is grounded and at least two negative voltages are respectively applied to the control gate electrode, so that a voltage is applied to the tunnel film. In these cases, charge retention properties are evaluated. The voltages applied to the control gate electrode are controlled so that the voltage applied to the tunnel film does not exceed a voltage applied to the tunnel film during a memory operation. A charge retention property when no voltage is applied across the control gate electrode and the substrate, i.e., when no voltage is externally applied to the tunnel film, is estimated by the charge retention properties when the two voltages are applied to the control gate electrode.
申请公布号 US6339557(B1) 申请公布日期 2002.01.15
申请号 US20000583868 申请日期 2000.05.31
申请人 DENSO CORPORATION 发明人 KAWAGUCHI TSUTOMU;FUKATSU SHIGEMITSU;KATADA MITSUTAKA
分类号 G11C17/00;G01R31/28;G01R31/30;G11C29/50;G11C29/56;H01L21/66;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C7/04;G11C16/04 主分类号 G11C17/00
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