| 摘要 |
To compensate for temperature dependent variations and process variations in surface resistance of a main resistor (R1) on a chip (1), one or more compensating resistors (R11, R12. . . R1n) can be connected in series with the first resistor (R1) via normally open switches (SR11, SR12. . . SR1n). The switches are closed to connect one or more of the compensating resistors (R11, R12. . . SR1n) in series with the main resistor (R1) in response to whether the voltage across resistors (R21, R22. . . R2n) produced on the chip (1) in the same process and proportional to the compensating resistors (R11, R12. . . R1n) is higher or lower than a fixed reference voltage (VR3). |
