发明名称 METHOD FOR PLATING COLUMNAR PROTRUSION IN INTEGRATED CIRCUIT SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To provide a method for plating a columnar protrusion in an integrated circuit substrate. SOLUTION: This method comprises, (1) plating a copper-wire circuit 12 on a top plate 11 of a substrate 1 by a prior art (for example, a metal plating method), (2) coating one junction shielding layer 13 on the top plate 11, the height (thickness) of which is just the same as that necessary to the following columnar protrusion 17, (3) opening an aperture 14 in an opposite position to the copper wire circuit of the junction shielding layer 13, (4) plating pure copper 15 on the copper wire circuit 12 by a metal plating technique, to make the pure copper 15 columnar at a location of the aperture 14, (5) plating another one metal layer of a tin-lead alloy 16 for welding on the top of the columnar pure copper 15, to make the height of the same as that of the junction shielding layer 13, and (6) removing the junction shielding layer 13 to leave the columnar protrusion. Thus, the columnar protrusion 17 is flip-chip bonded with a die. Because the height is increased with the plated pure copper 15 and the thickness is extremely suitable, a precision level can be enhanced.
申请公布号 JP2002012997(A) 申请公布日期 2002.01.15
申请号 JP20000326797 申请日期 2000.10.26
申请人 ORIENT SEMICONDUCTOR ELECTRONICS LTD 发明人 HSIEN WEN-LO;CHENG CHUANG YUNG;NING HUANG;PIN CHEN HUI;WEN CHIANG HUA;MING CHANG CHUANG;CHANG TU FENG;YU HUANG FU;JUI CHANG HSUAN;CHIEH HU CHIA
分类号 C25D5/02;B23K35/14;C25D7/12;H01L21/48;H01L21/60;H01L23/498;H05K3/40 主分类号 C25D5/02
代理机构 代理人
主权项
地址