| 摘要 |
The present invention provides a reset circuit of a semiconductor circuit, which can reliably reset plural reset target circuits in the semiconductor circuit, even in a case where a surge noise signal having a short pulse length or the like is input to the reset circuit. A reset signal control circuit 120 for controlling a timing of deactivating a reset instruction signal which resets plural reset target circuits 141 to 143 in the semiconductor circuit is included. When the respective reset target circuits have been reset, the respective reset target circuits output reset completion signals S141 to S143 to the reset signal control circuit 120. Then, when all of the reset completion signals S141 to S143 have been activated, the reset signal control circuit 120 deactivates the reset instruction signal.
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