发明名称 COLUMN GATE CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: A column gate circuit of a semiconductor memory device is provided, which can equalize a bit line rapidly after a read operation by preventing the spreading of a bit line of a column which is not selected while reading data. CONSTITUTION: A number of memory cells(10n) store data or send stored data to bit lines(BL0,BBL0). A precharge and equalize circuit part(20n) precharges or equalizes the bit lines with a precharge voltage by an equalizing signal(EQ). A column gate circuit part(30) connects the bit lines to a data line(DL0) and a data bar line(DBL0) respectively. And a control unit(AND0) controls the operation of two adjacent column gate circuit part for two adjacent bit line pair to be equalized when the equalize signal is active and chip selection signals(CS0,CSB0) are disabled.
申请公布号 KR20020002671(A) 申请公布日期 2002.01.10
申请号 KR20000036908 申请日期 2000.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, JAE UN
分类号 G11C11/4091;(IPC1-7):G11C11/409 主分类号 G11C11/4091
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