发明名称 METHOD AND DEVICE FOR OBSERVING LOGICAL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To set the number of observation points separately from the number of set points for correction input signal while evaluation debugging continues for a logical circuit even if failure occurs at a plurality of observation points. SOLUTION: An m-ary address counter 12 outputs an SEL8 with a counter value as a selection signal 27. The SEL8 selects and outputs as an observation output signal 28, using a selection signal 27 out of observation signals (a normal output signal 24) acquired from an observation point in a logical circuit which is to be observed. If the observation output signal 28 is abnormal, a correction input signal 25 is applied from outside of the logical circuit for changing the logic of the signal. At an address decoder 9, a specification signal 26 (a counter value which is outputted to the address decoder 9 by an n-ary address counter 11) for specifying a selector for a point which requires change of signal logic is received, and an address corresponding to the signal is generated and outputted to selectors 5-7. The selector of the address selects the correction input signal 25.
申请公布号 JP2002006005(A) 申请公布日期 2002.01.09
申请号 JP20000180415 申请日期 2000.06.15
申请人 NEC MIYAGI LTD 发明人 MIURA KAZUYA
分类号 G01R31/317;G01R31/28;G06F11/22 主分类号 G01R31/317
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