| 摘要 |
PURPOSE: A method for manufacturing a flash memory cell is provided to prevent an Isb defect in testing capacity of a device, by completely eliminating ONO dielectric residue and polysilicon residue in a self-aligned etch process of an ONO dielectric layer. CONSTITUTION: A tunnel oxide layer(23) and the first polysilicon layer(24) are formed on a semiconductor substrate(21), and are patterned by using a floating gate mask. An ONO dielectric layer(25), the second polysilicon layer(26), a top polysilicon layer(27), a tungsten silicide layer(28) and an anti-reflective layer(ARL)(29) are formed on the first polysilicon layer. The ARL, the tungsten silicide layer, the top polysilicon layer and the second polysilicon layer are patterned by an etching process using a control gate mask. The ONO dielectric layer is formed by a self-aligned etching process including O2 gas.
|
