| 摘要 |
An SRAM cell is arranged in a semiconductor device. A metal oxide semiconductor field effect transistor is arranged in the SRAM cell. An interlayer insulating film is formed on the metal oxide semiconductor field effect transistor. A load resistor conductive layer is formed on the interlayer insulating film. In addition, a wiring conductive layer which connects the gate electrode of the metal oxide semiconductor field effect transistor to the load resistor conductive layer is provided. The resistance of the wiring conductive layer is lower than the resistance of the load resistor conductive layer. A side wall is formed between the load resistor conductive layer and the wiring conductive layer.
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