发明名称 DUTY CYCLE CORRECTING CIRCUIT AND METHOD
摘要 PROBLEM TO BE SOLVED: To provide a duty cycle correcting circuit and a correcting circuit capable of preventing a duty cycle error and generating an output signal having an accurately 50% duty cycle. SOLUTION: An inversion delay circuit receives an input signal and inversion delays the input signal for a predetermined time. A phase mixer receives the input signal and an output signal of the delay circuit, and generates an output signal which rises at an intermediate time point of a rising edge of the input signal and a rising edge of the out output signal of the delay circuit and falls at an intermediate time point of a falling edge of the input signal and a falling edge of the output signal of the delay circuit. The delay circuit has a delay circuit for delaying the input signal for the predetermined time and an inverting circuit for inverting the signal delayed for the predetermined time in such a manner that the delay circuits are desirably constituted of delay synchronizing loop circuits.
申请公布号 JP2001352234(A) 申请公布日期 2001.12.21
申请号 JP20010109868 申请日期 2001.04.09
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 KIN KEIKEN;RI TEIBAI
分类号 H03K5/04;H03K5/13;H03K5/156;H03L7/081;(IPC1-7):H03K5/04 主分类号 H03K5/04
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