发明名称 |
SEMICONDUCTOR DEVICE, MODULE INCLUDING SEMICONDUCTOR DEVICE, AND SYSTEM INCLUDING MODULE |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide a module in which output data can be synchronized accu rately with a clock without being affected by a power source noise. SOLUTION: This module has a phase adjusting circuit (16) generating a second clock (CLK2) so that a signal (DUMM2) for adjusting a phase outputted from a semiconductor device (123) and a first clock (CLK) keep the prescribed phase relation and outputting it, and output circuits (114, 115) provided in the semiconductor device and generating the signal for adjusting a phase from the second clock.</p> |
申请公布号 |
JP2001351380(A) |
申请公布日期 |
2001.12.21 |
申请号 |
JP20000172483 |
申请日期 |
2000.06.08 |
申请人 |
FUJITSU LTD |
发明人 |
MATSUZAKI YASURO |
分类号 |
G11C11/407;G06F1/10;G06F5/06;G06F12/00;G06F12/06;G11C5/06;G11C7/10;G11C7/22;G11C11/401;H03L7/07;H03L7/081;(IPC1-7):G11C11/407 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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