| 摘要 |
<p>A receiving device for CDMA which has a small scale of a circuit including a matched filter and on which the processing load of despreading is lightened. A received signal quadruple-oversampled with respect to the chip rate is downsampled by a speed changing unit (10), so that a matched filter (20) is operated in a double oversampling mode to detect the pass timing. The pass timing detected is fed to a timing adjusting unit (60) of a finger (30) and corrected and used as a demodulation timing on the basis of a differential value calculated by a DLL (40). In this correction, the timing is shifted forward/backward by 1 clock of the quadruple oversampling frequency.</p> |
