发明名称 DYNAMIC RAM
摘要 PROBLEM TO BE SOLVED: To provide a dynamic RAM of a single intersection point system improved in operating margin and a semiconductor device. SOLUTION: This dynamic RAM has a plurality of memory mats including a plurality of the dynamic memory cells which consist of MOSFETs and capacitors, plural word lines which are respectively connected to the selection terminals of the plural memory cells, plural complementary pit line pairs which are respectively connected to the input/output terminals of the plural memory cells and are so arranged as to be extended in directions reverse from each other around one end and a plurality of memory mats which are arranged on one end side of the complementary pit line pairs and contain sensor amplifier arrays consisting of plural latch circuits for respectively amplifying the voltage differences of such complementary pit lines. The semiconductor regions formed with the memory cells in all of the plural sense amplifier arrays are provided with a plurality of contact parts for supplying bias voltages thereto by which the bias voltage is stabilized.
申请公布号 JP2001344964(A) 申请公布日期 2001.12.14
申请号 JP20000159338 申请日期 2000.05.30
申请人 HITACHI LTD 发明人 SEKIGUCHI TOMONORI;KAJITANI KAZUHIKO
分类号 G11C11/401;H01L21/8242;H01L27/108 主分类号 G11C11/401
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