| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of circuit elements constituting a CAM cell. SOLUTION: First and second memory cells 11, 12 constituting a CAM cell 10 are provided with respective first and second capacitors C1, C2 into which first and second register data being reverse to each other are respectively written. The one ends of the first and second capacitors C1, C2 are connected to the power source line of a voltage of 1/2 of high potential power source voltage Vii, the other ends are connected respectively to the gates of first and second compare-transistors T1, T2. The drain of the first compare-transistor T1 is connected to an output signal line ML, and its source is connected to a data bus line DB2. The drain of the second compare-transistor is connected to the output signal line ML, and its source is connected to a data bus line DB1. The first and the second data bus lines DB1, DB2 are a pair of complementary data bus lines, and to which first and second reference data being reverse to each other are respectively inputted.
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