发明名称 |
HOST INTERFACE CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a host interface circuit capable of remarkably reducing the signal transition of an external address from an external host control device to reduce the power consumption and restricting the complication of the software processing of the external host control device by adding a simple address generating circuit to an interface circuit for transmitting the data through a bus controller circuit of the external host control device without using a DMA controller and a memory bus. SOLUTION: This host interface circuit has a second address as a specified external address for continuously accessing to a series of area in an internal memory space 105 of a device 101 connected to an external host control device, and in the case of continuously accessing to the series of area in the internal memory space 105, an address generating circuit 204 inside of a host interface circuit 103 generates an internal address in the internal memory space 105 in response to the second address to transmit the data.
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申请公布号 |
JP2001344187(A) |
申请公布日期 |
2001.12.14 |
申请号 |
JP20000160828 |
申请日期 |
2000.05.30 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
HASHIMOTO TAKASHI;TAKAHASHI YASUO |
分类号 |
G06F13/12;G06F13/16;G06F13/38;(IPC1-7):G06F13/12 |
主分类号 |
G06F13/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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