发明名称 BUFFER CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To suppress expansion in circuit scale by dispensing with a reserve buffer, even when the number of data shorter than a buffer length is large, in comparison with a transfer data rate. SOLUTION: A stop signal generating part 5 is provided for generating a stop signal ST for stopping transfer, on the basis of the value of a flag signal F.
申请公布号 JP2001338287(A) 申请公布日期 2001.12.07
申请号 JP20000154941 申请日期 2000.05.25
申请人 NEC MICROSYSTEMS LTD 发明人 SHINKAWA MORIYASU;IDAKA MICHIAKI
分类号 B41J5/30;G06F3/12;G06F5/06;G06T1/20;G06T1/60;(IPC1-7):G06T1/60 主分类号 B41J5/30
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