| 摘要 |
An invention about inverse discrete cosine transformer of MPEG decoder is disclosed. By using the symmetry of NxN IDCT kernel matrix, the invention reduces the number of multipliers to N/4, the number of accumulators to N/2 in IDCT block without loss of decoding speed. This invention include memory parts, N/4 multipliers, M/2 accumulators and transposing means. Memory parts store absolute values of kernel matrix of inverse discrete cosine transform. N/4 multipliers receive elements of discrete cosine transform coefficient matrix or of transpose matrix of one-dimensional inverse discrete cosine transform coefficient matrix, as their multiplicand input, and elements of kernel matrix of inverse discrete cosine transform as their multiplier input. N/2 accumulators accumulate data outputted from multiplier. Transposing means transpose data outputted from accumulator and output one-dimensional inverse discrete cosine transform coefficient matrix or two-dimensional inverse discrete cosine transform coefficient matrix. The effects of this invention is the reduction of hardware size due to reducing the number of multipliers and accumulators. Also, in spite of the reduction of hardware size, this invention satisfies the resolution and operational speed requirements of MP@ML and CCIR 601 of MPEG2.
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