发明名称 Semiconductor integrated circuit for cryptographic process and encryption algorithm alternating method
摘要 A semiconductor integrated circuit for cryptographic process according to the present invention, comprises a randomizing unit for randomizing first input data which is one of two divided parts of input data based on configuration information to identify an algorithm in randomizing process, a function F portion for receiving data which have been subjected to the randomizing process and then applying coding process to the data, and an exclusive logical sum circuit for receiving second input data which is other of two divided parts of the input data and output data from the function F portion and then outputting an exclusive logical sum of the second input data and the output data.
申请公布号 US6327654(B1) 申请公布日期 2001.12.04
申请号 US19980151774 申请日期 1998.09.11
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OOWAKI YUKIHITO;FUJII HIROSHIGE;SHIMIZU HIDEO;KATO TAKEHISA;ENDO NAOKI;MASUDA ATSUSHI;NISHI HIROAKI;OHUCHI KAZUNORI;SEKINE MASATOSHI
分类号 G06F21/00;G09C1/00;H04L9/06;(IPC1-7):G06F11/30 主分类号 G06F21/00
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