| 摘要 |
A self-calibrating circuit of a high speed comparator, having a first negative phase logic switch, a second negative logic switch, a first positive phase logic switch, a second positive phase logic switch, a third negative phase logic switch, a fourth negative phase logic switch, a third positive phase logic switch, a fourth positive phase logic switch, a fifth positive phase logic switch, a first current source circuit, a second current source circuit and a control logic circuit. Using the first and the second current source circuits, a self-calibration can be performed while the high speed comparator is just turned on, so that the input offset voltage of the high speed comparator can be eliminated.
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