发明名称 FLAT SURFACE DISPLAY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To prevent deterioration in characteristics due to application of a DC to a light-modulating layer when an abnormality occurs on a reference clock signal in a flat surface display device configured so as to control a video signal output based on the reference clock signal, and also to achieve an improvement in productivity as well as low cost. SOLUTION: When a clock detection circuit 108 for outputting a 1st or a 2nd detection signal according to the state of the reference clock signal outputs the 1st detection signal, the voltage of video bus wiring is set to a video signal potential, when the 2nd detection signal is outputted therefrom, a data line potential control circuit 109 sets the voltage of the video bus wiring to a common potential; when an abnormality occurs on the reference clock signal, each voltage of a pixel electrode and a counter electrode is set to a same potential by the 2nd detection signal outputted, and thus a DC voltage is prevented from being applied to a liquid crystal layer held between the electrodes.</p>
申请公布号 JP2001318657(A) 申请公布日期 2001.11.16
申请号 JP20000138562 申请日期 2000.05.11
申请人 TOSHIBA CORP 发明人 AKIYAMA ICHIRO
分类号 G02F1/136;G02F1/133;G02F1/1368;G09G3/20;G09G3/36;(IPC1-7):G09G3/36 主分类号 G02F1/136
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