发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To relieve a defective leak current by suppressing over-head of a circuit. SOLUTION: Increase of the area of a memory cell array is suppressed by sharing memory cell power source lines 111-116 with an adjacent memory cell, a column including a defective memory cell and a column adjacent to this column are replaced by a redundant memory cell array 104, and power source separating means 121-126 corresponding to a memory cell power source line of the defective memory cell are made to be non-conductive.
申请公布号 JP2001319492(A) 申请公布日期 2001.11.16
申请号 JP20000136867 申请日期 2000.05.10
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NORIMURA SHIGEO
分类号 G11C11/413;G06F12/16;G11C29/00;G11C29/04;H01L21/82;H01L21/822;H01L27/04;H01L27/10;(IPC1-7):G11C29/00 主分类号 G11C11/413
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