发明名称 Process for reducing extraneous metal plating
摘要 Printed circuit boards, cards and chip carriers are fabricated by treating an already circuitized substrate with a swelling agent, then treating the circuitized substrate with a composition containing an alkaline permanganate, a chromate and/or chlorite and then applying a metal layer to coat the circuitized portion of the substrate.
申请公布号 US2001040047(A1) 申请公布日期 2001.11.15
申请号 US20010917701 申请日期 2001.07.31
申请人 KONRAD JOHN JOSEPH;PAPATHOMAS KONSTANTINOS I.;WELLS TIMOTHY LEROY;WILSON JAMES WARREN 发明人 KONRAD JOHN JOSEPH;PAPATHOMAS KONSTANTINOS I.;WELLS TIMOTHY LEROY;WILSON JAMES WARREN
分类号 C23C18/16;H05K3/18;H05K3/24;H05K3/26;(IPC1-7):H05K1/00;B05D5/12;H02B1/24 主分类号 C23C18/16
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