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发明名称
Input pad of semiconductor device
摘要
<p>본 발명은 반도체소자의 입력단에 관한 것으로서, 특히 입력 패드와 내부회로의 사이에 ESD 방전용 NPN 필드 트랜지스터를 구비하는 입력단 구조에서 패드와 연결되는 N활성영역측의 소오스 N활성영역에 인접하게 P활성영역을 형성하여 Vss로의 저항 성분을 감소시켜, ESD 보호와 함께 고속 동작 소자의 최적 Ri를 조절할 수 있어 공정수율 및 소자동작의 신뢰성을 향상시킬 수 있다.</p>
申请公布号
KR100313152(B1)
申请公布日期
2001.11.07
申请号
KR19990066309
申请日期
1999.12.30
申请人
null, null
发明人
이현우;배세열
分类号
H01L27/04
主分类号
H01L27/04
代理机构
代理人
主权项
地址
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