| 摘要 |
PURPOSE: A static clock pulse generator and a display are provided to obtain the static clock pulse generator including plural stages, each of which includes a D-type flip-flop and a gating circuit, wherein the flip-flop supplies an output signal of the stage to be used also as a gating signal for the gating circuit of the post stage. CONSTITUTION: A static clock pulse generator is formed by two card rows(1,2). The card row(1) contains a D type latch(3) and a gate circuit(4). The latch(3) has a direct type output(Q) and a reversed type output(Q). The latch(4) has an asynchronous type reset-input R which receives a reset signal from the latter part. The gating circuit(4) has the complementary-type clocked into CK connected to the master-clock input through the clock line common to all card rows, and CK. The clocked into CK of the gating circuit(4) of the card row(1) is connected to the clock line CK. The gating circuit(4) has complementary-type gating inputs G and G which receive a gating signal from the preceding paragraph. The card row(1) is activated by the direct type clock pulse CK, and the card row(2) is a reversed type clock pulse.
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