发明名称 METHOD AND DEVICE FOR IDENTIFYING SEPARABLE PACKET IN MULTI-THREAD VLIW PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a method and a device for allocating a functional unit in a multi-thread very long instruction word(VLIW) processor. SOLUTION: A part of efficiency lost by the conventional multi-thread architecture is restored by using separation of instruction packet. Partial issuance of an instruction bundle in one cycle and issuance of the remaining bundles during the following cycles are enabled when the separation instruction packet is used. However, the instruction packet can not be sometimes separated without violating semantics of the instruction packet assembled by a compiler. A separation bit notifies time when the separation is prohibited to hardware. Allocation hardware does not allocate all instructions in the instruction packet at a time but allocates the instructions with the number to coincide with the number of usable functional units from each packet when no separation bit is set. The instructions which are not allocated to the functional units are held in an executable state register.
申请公布号 JP2001306324(A) 申请公布日期 2001.11.02
申请号 JP20010094461 申请日期 2001.03.29
申请人 AGERE SYSTEMS GUARDIAN CORP 发明人 BERENBAUM ALAN DAVID;HEINTZE NEVIN;JEREMIASSEN TOR E;KAXIRAS STEFANOS
分类号 G06F9/30;G06F9/38;G06F9/45;(IPC1-7):G06F9/38 主分类号 G06F9/30
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