发明名称 Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
摘要 A transistor (30) and method for forming a transistor using an edge blocking material (24) is disclosed herein. The edge blocking material (24) may be located adjacent a gate (22) or disposable gate or may be part of a disposable gate. During an angled pocket implant, the edge blocking material (24) blocks some dopant from entering the semiconductor body (10) and the dopant (18) placed under the edge blocking material is located at a given distance below the surface of the semiconductor body (10).
申请公布号 US2001036713(A1) 申请公布日期 2001.11.01
申请号 US20010899783 申请日期 2001.07.05
申请人 RODDER MARK S.;NANDAKUMAR MAHALINGAM 发明人 RODDER MARK S.;NANDAKUMAR MAHALINGAM
分类号 H01L29/78;H01L21/265;H01L21/336;H01L21/8238;H01L27/092;H01L29/08;H01L29/10;H01L29/47;H01L29/49;(IPC1-7):H01L21/425 主分类号 H01L29/78
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