发明名称 |
MICROPROCESSOR HAVING FIRST-ORDER ISSUING QUEUE AND SECOND-ORDER ISSUING QUEUE |
摘要 |
PROBLEM TO BE SOLVED: To provide a processor, a data processing system and a processor instruction processing method related with this. SOLUTION: The processor is suited for dispatching an instruction to an issuing unit which includes the first-order issuing queue and the second-order issuing queue. The instruction is stored in the first-order issuing queue when it can be issued presently for execution and is stored in the second-order issuing queue when it cannot be issued presently. The processor decides an instruction to be issued next from the instruction of the first-order issuing queue. The instruction can be moved from the first-order issuing queue to the second-order issuing queue in the case of depending on the result of another instruction. |
申请公布号 |
JP2001297000(A) |
申请公布日期 |
2001.10.26 |
申请号 |
JP20000391228 |
申请日期 |
2000.12.22 |
申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
KARL JAMES A;MORREY CHARLES R |
分类号 |
G06F9/06;G06F9/30;G06F9/318;G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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