发明名称 Recording/reproducing system
摘要 An analog image signal from an input terminal 101is converted in an ADC 102 to digital data, then stored in a frame memory 103, then subjected to compression processing in a compression processing module 104, and then recorded in a recorder 105. The compressed data recorded in the recorder 105 is read out, then subjected to decompression processing in a decompression processing module 106, and then stored in a frame memory 107. The operation of the compression processing module 104 is controlled by a frame rate controller 110. Thus, the problem of frame data drop-out or reproducing processing delay occurrence when it becomes unable to obtain full frame real time frame capturing, real time compression and real time decompression due to CPU performance insufficiency is solved.
申请公布号 US2001033740(A1) 申请公布日期 2001.10.25
申请号 US20010837190 申请日期 2001.04.19
申请人 SAWADA HIDEKI 发明人 SAWADA HIDEKI
分类号 H04N5/92;G11B20/10;H04N7/46;H04N7/50;H04N9/804;(IPC1-7):H04N5/92;H04N7/26 主分类号 H04N5/92
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